Use of elliptic curves in cryptography
Lecture notes in computer sciences; 218 on Advances in cryptology---CRYPTO 85
Error control systems for digital communication and storage
Error control systems for digital communication and storage
Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Handbook of Applied Cryptography
Handbook of Applied Cryptography
On Computing Multiplicative Inverses in GF(2/sup m/)
IEEE Transactions on Computers
Bit-Parallel Finite Field Multiplier and Squarer Using Polynomial Basis
IEEE Transactions on Computers
Improved Algorithms for Elliptic Curve Arithmetic in GF(2n)
SAC '98 Proceedings of the Selected Areas in Cryptography
Fast Multiplication on Elliptic Curves over GF(2m) without Precomputation
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Dual-Field Arithmetic Unit for GF(p) and GF(2m)
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Achieving NTRU with Montgomery Multiplication
IEEE Transactions on Computers
A Scalable Dual-Field Elliptic Curve Cryptographic Processor
IEEE Transactions on Computers
A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm
IEEE Transactions on Computers
New Systolic Architectures for Inversion and Division in GF(2^m)
IEEE Transactions on Computers
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m)
IEEE Transactions on Computers
IEEE Transactions on Computers
Design of a scalable RSA and ECC crypto-processor
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A Unified Architecture for Crypto-processing in Embedded Systems
ICESS '05 Proceedings of the Second International Conference on Embedded Software and Systems
An Adaptable And Scalable Asymmetric Cryptographic Processor
ASAP '06 Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors
IEEE Transactions on Computers
Fast elliptic curve cryptography on FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A new modular exponentiation architecture for efficient design of RSA cryptosystem
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An area-efficient universal cryptography processor for smart cards
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A microcoded elliptic curve processor using FPGA technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
FPGA based unified architecture for public key and private key cryptosystems
Frontiers of Computer Science: Selected Publications from Chinese Universities
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With rapid increases in communication and network applications, cryptography has become a crucial issue to ensure the security of transmitted data. In this paper, we propose a microcode-based architecture with a novel reconfigurable datapath which can perform either prime field GF(p) operations or binary extension field GF (2m) operations for arbitrary prime numbers, irreducible polynomials, and precision. Using these field arithmetic units, users are capable of programming cryptographic algorithms in microcode sequences for full compliance with a majority of public-key cryptographic algorithms such as Rivest-Shamir-Adleman (RSA) and elliptic curve cryptosystems. An algorithmic optimization or refinement can thus be made at a higher level based on the reconfigurable datapath. Experimental results show that the developed processor has full cryptography algorithm flexibility, high hardware utilization, and high performance.