An improved Montgomery's algorithm for high-speed RSA public-key cryptosystem
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Use of Elliptic Curves in Cryptography
CRYPTO '85 Advances in Cryptology
A Scalable Architecture for Montgomery Multiplication
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
A high-performance platform-based SoC for information security
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A high-performance unified-field reconfigurable cryptographic processor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Typed assembler for a RISC crypto-processor
ESSoS'12 Proceedings of the 4th international conference on Engineering Secure Software and Systems
A fully homomorphic crypto-processor design: correctness of a secret computer
ESSoS'13 Proceedings of the 5th international conference on Engineering Secure Software and Systems
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In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on modified Montgomery algorithm for finite fields GF(P) and GF(2m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption ratè of 276 Kbps and a 160-bit ECC encryption rate of 73.3 Kbps for a 220MHz clock rate.