Reduced instruction set computers
Communications of the ACM - Special section on computer architecture
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
AES and the cryptonite crypto processor
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Design of a scalable RSA and ECC crypto-processor
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computers
A fully homomorphic crypto-processor design: correctness of a secret computer
ESSoS'13 Proceedings of the 5th international conference on Engineering Secure Software and Systems
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Our general purpose crypto-processor runs RISC machine code in an encrypted environment, reading encrypted inputs and generating encrypted outputs while maintaining data encrypted in memory. Its intended use is secure remote processing. However, program addresses are processed unencrypted, resulting in a mix of encrypted and unencrypted data in memory and registers at any time. An aspect of compiling for it is typing the assembler code to make sure that those instructions that expect encrypted data always get encrypted data at execution time, and those that expect unencrypted data get unencrypted data. A type inference system is specified here and transformed into an executable typing algorithm, such that a type-checked asembler program is guaranteed type-safe.