Clock synchronization in distributed real-time systems
IEEE Transactions on Computers - Special Issue on Real-Time Systems
The Time-Triggered Ethernet (TTE) Design
ISORC '05 Proceedings of the Eighth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
Formal verification of time-triggered systems
Formal verification of time-triggered systems
Easy parameterized verification of biphase mark and 8n1 protocols
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automated formal verification of the TTEthernet synchronization quality
NFM'11 Proceedings of the Third international conference on NASA Formal methods
The TTEthernet synchronisation protocols and their formal verification
International Journal of Critical Computer-Based Systems
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TTEthernet is a communication infrastructure for mixed-criticality systems that integrates dataflow from applications with different criticality levels on a single network. For applications of highest criticality, TTEthernet provides a synchronization strategy that tolerates multiple failures. The resulting fault-tolerant timebase can then be used for time-triggered communication to ensure temporal partitioning on the shared network. In this paper, we present the formal verification of the compression function which is a core element of the clock synchronization service of TTEthernet. The compression function is located in the TTEthernet switches: it collects clock readings from the end systems, performs a fault-tolerant median calculation, and feedbacks the result to the end systems. While traditionally the formal proof of these types of algorithms is done by theorem proving, we successfully use the model checker sal-inf-bmc incorporating the YICES SMT solver. This approach improves the automatized verification process and, thus, reduces the manual verification overhead.