Testability features in the TMS370 family of microcomputers

Authors:
Theo J. Powell;Fred Hwang;Bill Johnson
Affiliations:
Texas Instruments, Inc., Dallas, TX;Texas Instruments, Inc., Stafford, TX;Texas Instruments, Inc., Dallas, TX
Venue:
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Year:
1988

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Abstract

The TMS370 family of microcomputers was designed with a requirement for 99% stuck fault coverage. A Design For Testability (DFT) methodology called Parallel/Serial Scan Design (PSSD) was used which partitioned the design in to independently testable modules along functional divisions. The automatically generated tests are then reuseable when the same functional module is included in a different configuration of microcomputer by simply concatenating the module tests. Thus, test preparation is only needed once per module. The DFT methodology is presented along with the application results.