Switch-level concurrent fault simulation based on a general purpose list traversal mechanism

Authors:
Deborah Machlin;David Gross;Sudhir Kadkade;Ernst Ulrich
Affiliations:
Digital Equipment Corporation, Hudson, Massachusetts;Digital Equipment Corporation, Hudson, Massachusetts;Digital Equipment Corporation, Hudson, Massachusetts;Digital Equipment Corporation, Hudson, Massachusetts
Venue:
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Year:
1988

Citing 4
Cited 0

An experimental MOS fault simulation program CSASIM

DAC '84 Proceedings of the 21st Design Automation Conference
An MOS digital network model on a modified thevenin equivalent for logic simulation

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A fault simulator for MOS LSI circuits

DAC '82 Proceedings of the 19th Design Automation Conference
A Switch-Level Model and Simulator for MOS Digital Systems

IEEE Transactions on Computers

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Abstract

This paper describes a general purpose traversal mechanism which is used to perform concurrent simulation for complex devices. This traversal mechanism performs all list handling necessary for an accurate and efficient concurrent simulation at a complexity level much higher than that of the gate-level. The work on this general purpose traversal mechanism project has been done within the DECSIM [Kearney 84] logic simulator. The work to date includes the realization of concurrent MOS fault simulation and the early stage of designing concurrent behavior fault simulation.