Complexity of network synchronization
Journal of the ACM (JACM)
Conditional rewriting logic as a unified model of concurrency
Selected papers of the Second Workshop on Concurrency and compositionality
IEEE/ACM Transactions on Networking (TON)
Introduction to distributed algorithms
Introduction to distributed algorithms
Time, clocks, and the ordering of events in a distributed system
Communications of the ACM
Automatic Production of Globally Asynchronous Locally Synchronous Systems
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Bus Architectures for Safety-Critical Embedded Systems
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Semantics and pragmatics of Real-Time Maude
Higher-Order and Symbolic Computation
Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Implementing Synchronous Models on Loosely Time Triggered Architectures
IEEE Transactions on Computers
Verification of GALS Systems by Combining Synchronous Languages and Process Calculi
Proceedings of the 16th International SPIN Workshop on Model Checking Software
A Formal Architecture Pattern for Real-Time Distributed Systems
RTSS '09 Proceedings of the 2009 30th IEEE Real-Time Systems Symposium
All about maude - a high-performance logical framework: how to specify, program and verify systems in rewriting logic
The rewriting logic semantics project: a progress report
FCT'11 Proceedings of the 18th international conference on Fundamentals of computation theory
Synchronous AADL and its formal analysis in real-time Maude
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Simulation and verification of synchronous set relations in rewriting logic
SBMF'11 Proceedings of the 14th Brazilian conference on Formal Methods: foundations and Applications
Pattern-Based Composition and Analysis of Virtually Synchronized Real-Time Distributed Systems
ICCPS '12 Proceedings of the 2012 IEEE/ACM Third International Conference on Cyber-Physical Systems
FASE'12 Proceedings of the 15th international conference on Fundamental Approaches to Software Engineering
Formalization and correctness of the PALS architectural pattern for distributed real-time systems
Theoretical Computer Science
Design and analysis of cloud-based architectures with KLAIM and maude
WRLA'12 Proceedings of the 9th international conference on Rewriting Logic and Its Applications
The rewriting logic semantics project: A progress report
Information and Computation
Taming distributed system complexity through formal patterns
Science of Computer Programming
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Many Distributed Real-Time Systems (DRTS), such as integrated modular avionics systems and distributed control systems in motor vehicles, are made up of a collection of components that communicate asynchronously and that must change their state and respond to environment inputs within hard real-time bounds. Such systems are often safety-critical and need to be certified; but their certification is currently very hard due to their distributed nature. The Physically Asynchronous Logically Synchronous (PALS) architectural pattern can greatly reduce the design and verification complexities of achieving virtual synchrony in a DRTS. This work presents a formal specification of PALS as a formal model transformation that maps a synchronous design, together with performance bounds of the underlying infrastructure, to a formal DRTS specification that is semantically equivalent to the synchronous design. This semantic equivalence is proved, showing that the formal verification of temporal logic properties of the DRTS can be reduced to their verification on the much simpler synchronous design. An avionics system case study illustrates the usefulness of PALS for formal verification purposes.