Energy-efficient specialization of functional units in a coarse-grained reconfigurable array

  • Authors:
  • Brian C. Van Essen;Robin Panda;Aaron Wood;Carl Ebeling;Scott Hauck

  • Affiliations:
  • Lawrence Livermore National Laboratory, Livermore, CA, and University of Washington, Seattle, WA, USA;University of Washington, Seattle, WA, USA;University of Washington, Seattle, WA, USA;University of Washington, Seattle, WA, USA;University of Washington, Seattle, WA, USA

  • Venue:
  • Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
  • Year:
  • 2011
  • QUKU: A dual-layer reconfigurable architecture

    ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems

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Abstract

Functional units provide the backbone of any spatial accelerator by providing the computing resources. The desire for having rich and expensive functional units is in tension with producing a regular and energy-efficient computing fabric. This paper explores the design trade-off between complex, universal functional units and simpler, limited functional units. We show that a modest amount of specialization reduces the area-delay-energy product of an optimized architecture to 0.86× a baseline architecture. Furthermore, we provide a design guideline that allows an architect to customize the contents of the computing fabric just by examining the profile of benchmarks within the application domains.