The working set model for program behavior
Communications of the ACM
Programming semantics for multiprogrammed computations
Communications of the ACM
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
A computer architecture for highly parallel signal processing
ACM '74 Proceedings of the 1974 annual ACM conference - Volume 2
A multiprocessor system design
AFIPS '63 (Fall) Proceedings of the November 12-14, 1963, fall joint computer conference
Some thoughts on data flow architectures
ACM SIGARCH Computer Architecture News
Performance enhancement of SISD processors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Future Generation Computer Systems
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
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This paper presents the architecture of a highly concurrent multiprocessor which runs programs expressed in data flow notation. Sequencing of data flow instruction execution depends only on the availability of operands required by instructions. Because data flow instructions have no side effects, unrelated instructions can be executed concurrently without interference if each has its required operands. The data flow multiprocessor is hierarchically constructed as a network of simple modules. All module interactions are asynchronous. The principal working elements of the machine are a set of activation processors, each of which performs the execution of one invocation of a data flow procedure held in a local memory within the processor. A pipeline of logical units within each processor executes several concurrently active instructions. All data flow operations are performed within single processors except procedure calls, which cause the creation of new activations in other processors, and operations on large data structures, which are performed by structure controller modules using values stored in a central memory. Concurrency within a data flow procedure provides a processor with something to do while a slow operation is being processed. The behavior of the machine has been specified by a formal description language and has been shown to correctly implement the data flow language. The principal advantages of the data flow multiprocessor over conventional designs are reduced complexity of the processor-memory connection, greater use of pipelining, and a simpler representation and implementation of concurrent activity.