A vertical bubble flow network using inductive-coupling for 3-D CMPs
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces
Proceedings of the 49th Annual Design Automation Conference
3DMIA: a multi-objective artificial immune algorithm for 3D-MPSoC multi-application 3D-NoC mapping
Proceedings of the 15th annual conference companion on Genetic and evolutionary computation
3D integration for power-efficient computing
Proceedings of the Conference on Design, Automation and Test in Europe
Power consumption of 3D networks-on-chips: Modeling and optimization
Microprocessors & Microsystems
Scalable NoC-based architecture of neural coding for new efficient associative memories
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
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This book presents the research challenges that are due to the introduction of the 3rd dimension in chips for researchers and covers the whole architectural design approach for 3D-SoCs. Nowadays the 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures are emerging as interesting, truly hot, broad topics. The present book gathers the recent advances in the whole domain by renowned experts in the field to build a comprehensive and consistent book around the hot topics of three-dimensional architectures and micro-architectures. This book includes contributions from high level international teams working in this field.