Fast algorithms for IR voltage drop analysis exploiting locality
Proceedings of the 48th Design Automation Conference
Efficient algorithms for fast IR drop analysis exploiting locality
Integration, the VLSI Journal
Distributed power network co-design with on-chip power supplies and decoupling capacitors
Proceedings of the System Level Interconnect Prediction Workshop
Link breaking methodology: mitigating noise within power networks
Proceedings of the great lakes symposium on VLSI
Library-aware resonant clock synthesis (LARCS)
Proceedings of the 49th Annual Design Automation Conference
Active filter-based hybrid on-chip DC-DC converter for point-of-load voltage regulation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power distribution systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this second edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.