Pushing the limits: a very compact and a threshold implementation of AES
EUROCRYPT'11 Proceedings of the 30th Annual international conference on Theory and applications of cryptographic techniques: advances in cryptology
Higher-order glitches free implementation of the AES using secure multi-party computation protocols
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Intra-masking dual-rail memory on LUT implementation for tamper-resistant AES on FPGA
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Statistical tools flavor side-channel collision attacks
EUROCRYPT'12 Proceedings of the 31st Annual international conference on Theory and Applications of Cryptographic Techniques
PICARO: a block cipher allowing efficient higher-order side-channel resistance
ACNS'12 Proceedings of the 10th international conference on Applied Cryptography and Network Security
Threshold implementations of all 3×3 and 4×4 s-boxes
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
How far should theory be from practice?: evaluation of a countermeasure
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Power Analysis of Hardware Implementations Protected with Secret Sharing
MICROW '12 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops
On 3-share threshold implementations for 4-bit s-boxes
COSADE'13 Proceedings of the 4th international conference on Constructive Side-Channel Analysis and Secure Design
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
Masking vs. multiparty computation: how large is the gap for AES?
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
AES side-channel countermeasure using random tower field constructions
Designs, Codes and Cryptography
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Hardware implementations of cryptographic algorithms are vulnerable to side-channel attacks. Side-channel attacks that are based on multiple measurements of the same operation can be countered by employing masking techniques. Many protection measures depart from an idealized hardware model that is very expensive to meet with real hardware. In particular, the presence of glitches causes many masking techniques to leak information during the computation of nonlinear functions. We discuss a recently introduced masking method which is based on secret sharing and multi-party computation methods. The approach results in implementations that are provably resistant against a wide range of attacks, while making only minimal assumptions on the hardware. We show how to use this method to derive secure implementations of some nonlinear building blocks for cryptographic algorithms. Finally, we provide a provable secure implementation of the block cipher Noekeon and verify the results by means of low-level simulations.