Implementing elliptic curve cryptography
Implementing elliptic curve cryptography
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Exceptional Procedure Attackon Elliptic Curve Cryptosystems
PKC '03 Proceedings of the 6th International Workshop on Theory and Practice in Public Key Cryptography: Public Key Cryptography
Guide to Elliptic Curve Cryptography
Guide to Elliptic Curve Cryptography
Fast elliptic curve cryptography on FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Introduction to Mathematical Cryptography
An Introduction to Mathematical Cryptography
High Speed Compact Elliptic Curve Cryptoprocessor for FPGA Platforms
INDOCRYPT '08 Proceedings of the 9th International Conference on Cryptology in India: Progress in Cryptology
A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Integration, the VLSI Journal
High-Speed unified elliptic curve cryptosystem on FPGAs using binary huff curves
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
On the implementation of unified arithmetic on binary huff curves
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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Elliptic curve cryptography (ECC) has proven its superiority, since it was proposed in the domain of Public-Key Cryptography [1]. Further, Edwards curve adds a new paradigm to ECC in terms of speed and security against exceptional point attacks. This curve has been recently extended to Binary Edwards Curves (BEC), due to efficiency of implementation in GF(2m) fields and to harvest the advantages of a unified and complete scalar point multiplication on the family of BEC. In spite of achieving the unification, it introduces more challenges to the designer to reduce the computation time and trade-off the area in efficient way. This work reports an implementation of BEC processor with an effort to better utilize the look-up table (LUT) of the FPGA. The design further implements the ternary algorithm to increase the efficiency. However, to the best of our knowledge there exists no previous implementations of BEC on FPGA platform. The proposed design has been implemented for state-of-the-art GF(2233) fields. The performance of the design has been found to compare favorably with the existing designs on standard cell ASIC libraries, in spite of being implemented on FPGA platform.