Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic test data generation using constraint solving techniques
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Finding bugs with a constraint solver
Proceedings of the 2000 ACM SIGSOFT international symposium on Software testing and analysis
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Automatic Test Data Generation for Programs with Integer and Float Variables
Proceedings of the 16th IEEE international conference on Automated software engineering
Symbolic execution of floating-point computations: Research Articles
Software Testing, Verification & Reliability
Accelerating high-level bounded model checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Improving Constraint-Based Testing with Dynamic Linear Relaxations
ISSRE '07 Proceedings of the The 18th IEEE International Symposium on Software Reliability
CPBPV: A Constraint-Programming Framework for Bounded Program Verification
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
Bounded model checking of software using SMT solvers instead of SAT solvers
International Journal on Software Tools for Technology Transfer (STTT)
Test Data Generation of Bytecode by CLP Partial Evaluation
Logic-Based Program Synthesis and Transformation
SMT-Based Bounded Model Checking for Embedded ANSI-C Software
ASE '09 Proceedings of the 2009 IEEE/ACM International Conference on Automated Software Engineering
Exploration of the capabilities of constraint programming for software verification
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
A Survey of Automated Techniques for Formal Software Verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Checking safety properties is mandatory in the validation process of critical software. When formal verification tools fail to prove some properties, the automatic generation of counterexamples for a given loop depth is achievable, and is therefore an important issue in practice. We propose in this paper a dynamic constraint based exploration strategy for software bounded model checking. Constraint solving is integrated with state exploration to prune state space. Experiments on a real industrial Flasher Manager controller show that our system outperforms state of the art bounded model checking tools.