A real-time, FPGA based, biologically plausible neural network processor

Authors:
Martin Pearson;Ian Gilhespy;Kevin Gurney;Chris Melhuish;Benjamin Mitchinson;Mokhtar Nibouche;Anthony Pipe
Affiliations:
Intelligent Autonomous Systems laboratory, University of the West of England;Intelligent Autonomous Systems laboratory, University of the West of England;University of Sheffield;Intelligent Autonomous Systems laboratory, University of the West of England;University of Sheffield;Intelligent Autonomous Systems laboratory, University of the West of England;Intelligent Autonomous Systems laboratory, University of the West of England
Venue:
ICANN'05 Proceedings of the 15th international conference on Artificial neural networks: formal models and their applications - Volume Part II
Year:
2005

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Abstract

A real-time, large scale, leaky-integrate-and-fire neural network processor realized using FPGA is presented. This has been designed, as part of a collaborative project, to investigate and implement biologically plausible models of the rodent vibrissae based somatosensory system to control a robot. An emphasis has been made on hard real-time performance of the processor, as it is to be used as part of a feedback control system. This has led to a revision of some of the established modelling protocols used in other hardware spiking neural network processors. The underlying neuron model has the ability to model synaptic noise and inter-neural propagation delays to provide a greater degree of biological plausibility. The processor has been demonstrated modelling real neural circuitry in real-time, independent of the underlying neural network activity.