Lattice basis reduction: improved practical algorithms and solving subset sum problems
Mathematical Programming: Series A and B
Application-specific customization of parameterized FPGA soft-core processors
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
System architecture and implementation of MIMO sphere decoders on FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Array like runtime reconfigurable MIMO detectors for 802.11n WLAN: a design case study
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Vector Processing as a Soft Processor Accelerator
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Fine-grain performance scaling of soft vector processors
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Algorithm and implementation of the K-best sphere decoding for MIMO detection
IEEE Journal on Selected Areas in Communications
A lean FPGA soft processor built using a DSP block
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
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The most promising way to maintain reliable data transfer across the rapidly fluctuating channels used by next generation multipleinput multiple-output communications schemes is to exploit run-time variable modulation and antenna configurations. This demands that the baseband signal processing architectures employed in the communications terminals must provide low cost and high performance with runtime reconfigurability. We present a softcore-processor based solution to this issue, and show for the first time, that such programmable architectures can enable real-time data operation for cutting-edge standards such as 802.11n; furthermore, by exploiting deep processing pipelines and interleaved task execution, the cost and performance of these architectures is shown to be on a par with traditional dedicated circuit based solutions. We believe this to be the first such programmable architecture to achieve this, and the combination of implementation efficiency and programmability makes this implementation style the most promising approach for hosting such dynamic architectures.