Application-specific customization of soft processor microarchitecture
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Vector processing as a soft-core CPU accelerator
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
VESPA: portable, scalable, and flexible FPGA-based vector processors
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
AHS '09 Proceedings of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems
An ultra-fine processor for FPGA DSP chip multiprocessors
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
A pipeline interleaved heterogeneous SIMD soft processor array architecture for MIMO-OFDM detection
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
A Fault Tolerant Approach for FPGA Embedded Processors Based on Runtime Partial Reconfiguration
Journal of Electronic Testing: Theory and Applications
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As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage.