A 0.5-V 81.2 dB SNDR audio-band continuous-time Delta-Sigma modulator with SCR feedback

Authors:
Yan Chen;Kong-Pang Pun;Peter Kinget
Affiliations:
Department of Electronic Engineering, The Chinese University of Hong Kong, Hong Kong SAR, China;Department of Electronic Engineering, The Chinese University of Hong Kong, Hong Kong SAR, China;Department of Electrical Engineering, Columbia University, New York, USA
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2011

Citing 4
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Abstract

This manuscript presents a 0.5-V audio-band continuous-time Delta-Sigma modulator with a new method implementing switched-capacitor-resistor (SCR) feedback to reduce clock jitter-induced noise. An ultra-low voltage (ULV) amplifier with self-compensated CMFB loop is used to meet the stricter amplifier speed required by SCR feedback. Fabricated in a 0.13 μm CMOS process, the modulator achieves a peak SNDR of 81.2 dB over 25-kHz signal bandwidth and consumes 625 μW at 0.5-V supply.