Balance principles for algorithm-architecture co-design

  • Authors:

  • Kent Czechowski;Casey Battaglino;Chris McClanahan;Aparna Chandramowlishwaran;Richard Vuduc

  • Affiliations:

  • Georgia Institute of Technology, School of Computer Science;Georgia Institute of Technology, School of Computational Science and Engineering;Georgia Institute of Technology, School of Computer Science;Georgia Institute of Technology, School of Computational Science and Engineering;Georgia Institute of Technology, School of Computational Science and Engineering

  • Venue:
  • HotPar'11 Proceedings of the 3rd USENIX conference on Hot topic in parallelism
  • Year:
  • 2011

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Abstract

We consider the problem of "co-design," by which we mean the problem of how to design computational algorithms for particular hardware architectures and vice-versa. Our position is that balance principles should drive the co-design process. A balance principle is a theoretical constraint equation that explicitly relates algorithm parameters to hardware parameters according to some figure of merit, such as speed, power, or cost. This notion originates in the work of Kung (1986); Callahan, Cocke, and Kennedy (1988); and McCalpin (1995); however, we reinterpret these classical notions of balance in a modern context of parallel and I/O-efficient algorithm design as well as trends in emerging architectures. From such a principle, we argue that one can better understand algorithm and hardware trends, and furthermore gain insight into how to improve both algorithms and hardware. For example, we suggest that although matrix multiply is currently compute-bound, it will in fact become memory-bound in as few as ten years--even if last-level caches grow at their current rates. Our overall aim is to suggest how to co-design rigorously and quantitatively while still yielding intuition and insight.