Towards an energy complexity of computation

Energy-delay efficiency of VLSI computations

Proceedings of the 12th ACM Great Lakes symposium on VLSI

Transistor sizing of energy-delay--efficient circuits

Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems

ET2: a metric for time and energy efficiency of computation

Power aware computing

The Lutonium: A Sub-Nanojoule Asynchronous 8051 Microcontroller

ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems

Towards Efficient Supercomputing: A Quest for the Right Metric

IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 11 - Volume 12

Power and performance optimization at the system level

Proceedings of the 2nd conference on Computing frontiers

Towards understanding algorithmic factors affecting energy consumption: switching complexity, randomness, and preliminary experiments

DIALM-POMC '05 Proceedings of the 2005 joint workshop on Foundations of mobile computing

Exploiting Workload Parallelism for Performance and Power Optimization in Blue Gene

IEEE Micro

Power management of variation aware chip multiprocessors

Proceedings of the 18th ACM Great Lakes symposium on VLSI

Analyzing and optimizing energy efficiency of algorithms on DVS systems a first step towards algorithmic energy minimization

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Towards optimizing energy costs of algorithms for shared memory architectures

Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures

General strategies to design nanometer flip-flops in the energy-delay space

IEEE Transactions on Circuits and Systems Part I: Regular Papers

Making a case for a green500 list

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing

Modeling and synthesis of asynchronous pipelines

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Analysis and comparison in the energy-delay-area domain of nanometer CMOS flip-flops: part I-methodology and design strategies

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

A design-specific and thermally-aware methodology for trading-off power and performance in leakage-dominant CMOS technologies

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Balance principles for algorithm-architecture co-design

HotPar'11 Proceedings of the 3rd USENIX conference on Hot topic in parallelism

Towards efficient supercomputing: searching for the right efficiency metric

ICPE '12 Proceedings of the 3rd ACM/SPEC International Conference on Performance Engineering

Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures

Proceedings of the 39th Annual International Symposium on Computer Architecture

From energy-delay metrics to constraints on the design of digital circuits

International Journal of Circuit Theory and Applications