A configurable motion estimation architecture for block-matching algorithms
IEEE Transactions on Circuits and Systems for Video Technology
A high-performance three-engine architecture for H.264/AVC fractional motion estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Consumer Electronics
Hybrid parallel motion estimation architecture based on fast top-winners search algorithm
IEEE Transactions on Consumer Electronics
A new diamond search algorithm for fast block-matching motion estimation
IEEE Transactions on Image Processing
IEEE Transactions on Circuits and Systems for Video Technology
International Journal of Reconfigurable Computing
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This paper presents an efficient hardware architecture for motion estimation (ME) in high resolution digital videos. This architecture is built upon the new Multi-Point Diamond Search algorithm (MPDS) which is a fast algorithm that increases the ME quality when compared with other fast algorithms. The MPDS is able to reduce local minima falls, increasing the quality results of the motion vectors since less residual energy needs to be further encoded, especially in high definition videos. Two versions of this architecture are presented. The first one focuses on high performance, and the second one focuses on quality improvement. Both architectures were described in VHDL and synthesized to Stratix 4 FPGA and TSMC 90nm standard cells technology. The synthesis results show that both architectures achieve performance to process HD 1080p videos at 30 fps. These solutions also presented the lowest power consumption (4.5mW and 9mW) in comparison to the related works in the field, with a low hardware resources utilization.