Journal of Computer and System Sciences
Practical Pram Programming
Fpga-based prototype of a pram-on-chip processor
Proceedings of the 5th conference on Computing frontiers
Outline of RISC-based core for multiprocessor on chip architecture supporting moving threads
CompSysTech '09 Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing
Towards programming on the moving threads architecture
Proceedings of the 11th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing on International Conference on Computer Systems and Technologies
A moving threads processor architecture MTPA
The Journal of Supercomputing
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In this paper, we describe the architectural output of our `Moving threads realization study' (MOTH) project, which is a RISC-based multicore architecture framework. Each fraction of the memory can be accesses only via a certain core, via its cache memory. This approach leads to moving light-weight threads but at the same time provides strong memory coherences as no main memory location is replicated to several caches. We describe the overall multicore architecture, but special emphasis is put on describing the functionality of individual RISC-based core.