An optimal algorithm for layer assignment of bus escape routing on PCBs

Authors:
Qiang Ma;Evangeline F. Y. Young;Martin D. F. Wong
Affiliations:
University of Illinois at Urbana-Champaign;The Chinese University of Hong Kong;University of Illinois at Urbana-Champaign
Venue:
Proceedings of the 48th Design Automation Conference
Year:
2011

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Abstract

Bus escape routing is a critical problem in modern PCB design. Due to the huge pin count and high density of the pin array, it usually requires multiple layers to route the buses without any conflict. How to assign the escape routing of buses to different layers becomes an important issue. In addition, some buses are required to be assigned on consecutive layers, which adds more difficulties to the layer assignment problem. In this paper, we propose a branch-and-bound based algorithm that optimally solves the layer assignment problem of bus escape routing. Our algorithm guarantees to produce a feasible layer assignment of the buses with a minimum number of layers. We applied our algorithm on industrial data and the experimental results validate our approach.