Computer system architecture (3rd ed.)
Computer system architecture (3rd ed.)
Communication and Concurrency
Digital Design
Counter register: algebraic model and applications
WSEAS Transactions on Computers
Algebraic model for the intercommunicating hardware components behaviour
ICCOMP'08 Proceedings of the 12th WSEAS international conference on Computers
Algebraic model for the behaviour of a D-flip-flops-based memory component
MAMECTIS'10 Proceedings of the 12th WSEAS international conference on Mathematical methods, computational techniques and intelligent systems
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Taking into account the increasing importance of using formal methods in the specification and verification of the practical, industrial systems, we consider in this paper a concrete formal algebraic language applied for modelling the behaviour of the arithmetic-logic unit as one of the most important part of the computer's processing system. Following a specific structure of the arithmetic-logic unit, we define different algebraic specifications for internal logic unit behaviour and we formally and automatically prove the bisimulation equivalence between those specifications. This result has to be regarded in the framework of the authors' results in order to obtain an algebraic model for the entire computer behaviour based on the interconnected hardware components.