VLSI analogs of neuronal visual processing: a synthesis of form and function
VLSI analogs of neuronal visual processing: a synthesis of form and function
Simulating building blocks for spikes signals processing
IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part II
Two hardware implementations of the exhaustive synthetic AER generation method
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
IEEE Transactions on Neural Networks
Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip
IEEE Transactions on Neural Networks
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
IEEE Transactions on Neural Networks
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In this paper we present two implementations of spike-based band-pass filters, which are able to reject out-of-band frequency components in the spike domain. First one is based on the use of previously designed spike-based low-pass filters. With this architecture the quality factor, Q, is lower than 0.5. The second implementation is inspired in the analog multi-feedback filters (MFB) topology, it provides a higher than 1 Q factor, and ideally tends to infinite. These filters have been written in VHLD, and synthesized for FPGA. Two spike-based band-pass filters presented take advantages of the spike rate coded representation to perform a massively parallel processing without complex hardware units, like floating point arithmetic units, or a large memory. These low requirements of hardware allow the integration of a high number of filters inside a FPGA, allowing to process several spike coded signals fully in parallel.