Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
How to simulate billiards and similar systems
Journal of Computational Physics
Efficient algorithms for many-body hard particle molecular dynamics
Journal of Computational Physics
Analysis of an efficient algorithm for the hard-sphere problem
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Billiards and related systems on the bulk-synchronous parallel model
Proceedings of the eleventh workshop on Parallel and distributed simulation
Algorithms for particle-field simulations with collisions
Journal of Computational Physics
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
A Complexity O(1) priority queue for event driven molecular dynamics simulations
Journal of Computational Physics
FCCM '08 Proceedings of the 2008 16th International Symposium on Field-Programmable Custom Computing Machines
Parallel Discrete Event Simulation of Molecular Dynamics Through Event-Based Decomposition
ASAP '09 Proceedings of the 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors
The Art of Molecular Dynamics Simulation
The Art of Molecular Dynamics Simulation
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Discrete molecular dynamics simulation (DMD) uses simplified and discretized models enabling simulations to advance by event rather than by timestep. DMD is an instance of discrete event simulation and so is difficult to scale: even in this multi-core era, all reported DMD codes are serial. In this paper we discuss the inherent difficulties of scaling DMD and present our method of parallelizing DMD through event-based decomposition. Our method is microarchitecture inspired: speculative processing of events exposes parallelism, while in-order commitment ensures correctness. We analyze the potential of this parallelization method for shared-memory multiprocessors. Achieving scalability required extensive experimentation with scheduling and synchronization methods to mitigate serialization. The speed-up achieved for a variety of system sizes and complexities is nearly 6x on an 8-core and over 9x on a 12-core processor. We present and verify analytical models that account for the achieved performance as a function of available concurrency and architectural limitations.