IJCAI '95 Proceedings of the workshop on Intelligent agents II : agent theories, architectures, and languages: agent theories, architectures, and languages
FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators
FCCM '11 Proceedings of the 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines
Swarming distributed pattern detection and classification
E4MAS'04 Proceedings of the First international conference on Environments for Multi-Agent Systems
The environment: an essential abstraction for managing complexity in MAS-Based manufacturing control
E4MAS'05 Proceedings of the 2nd international conference on Environments for Multi-Agent Systems
Exploiting a virtual environment in a real-world application
E4MAS'05 Proceedings of the 2nd international conference on Environments for Multi-Agent Systems
A wideband DS-CDMA modem for a mobile station
IEEE Transactions on Consumer Electronics
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
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Dynamic Partial Reconfiguration of FPGAs enables tasks typically executed in software, such as threads and agents, to be executed directly in hardware. Typically, these systems use a CPU to manage the hardware and software tasks, but they do not take full advantage of the concurrency capable from an FPGA. This paper presents a hardware framework that leverages the concept of agents for FPGA-based designs. This enables not only the hardware modules to be viewed as agents, but also provides a means to selectively design and componentize the communications network for the hardware agents. The proposed framework enables hardware agents to be implemented to run concurrently and allows them to communicate with each other without requiring a CPU.