Proceedings of the 42nd annual Design Automation Conference
Energy efficient co-scheduling in dynamically reconfigurable systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
ACM Transactions on Embedded Computing Systems (TECS)
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A Reconfiguration-Aware Floorplacer for FPGAs
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Toward a runtime system for reconfigurable computers: a virtualization approach
Proceedings of the Conference on Design, Automation and Test in Europe
Operating System Structures for Multiprocessor Systems on Programmable Chip
RECONFIG '10 Proceedings of the 2010 International Conference on Reconfigurable Computing and FPGAs
Mechanism of resource virtualization in RCS for multitask stream applications
International Journal of Reconfigurable Computing - Special issue on selected papers from ReconFig 2009 International conference on reconfigurable computing and FPGAs (ReconFig 2009)
FPGA framework for agent systems using dynamic partial reconfiguration
HoloMAS'11 Proceedings of the 5th international conference on Industrial applications of holonic and multi-agent systems for manufacturing
RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC
FPL '11 Proceedings of the 2011 21st International Conference on Field Programmable Logic and Applications
Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants
IEEE Transactions on Computers
Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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In most existing works, reconfigurable hardware modules are still managed as conventional hardware devices. Further, the software reconfiguration overhead incurred by loading corresponding device drivers into the kernel of an operating system has been overlooked until now. As a result, the enhancement of system performance and the utilization of reconfigurable hardware modules are still quite limited. This work proposes a virtualizable hardware/software design infrastructure (VDI) for dynamically partially reconfigurable systems. Besides the gate-level hardware virtualization provided by the partial reconfiguration technology, VDI supports the device-level hardware virtualization. In VDI, a reconfigurable hardware module can be virtualized such that it can be accessed efficiently by multiple applications in an interleaving way. A Hot-Plugin Connector (HPC) replaces the conventional device driver, such that it not only assists the device-level hardware virtualization but can also be reused across different hardware modules. To facilitate hardware/software communication and to enhance system scalability, the proposed VDI is realized as a hierarchical design framework. User-designed reconfigurable hardware modules can be easily integrated into VDI, and are then executed as hardware tasks in an operating system for reconfigurable systems (OS4RS). A dynamically partially reconfigurable network security system was designed using VDI, which demonstrated a higher utilization of reconfigurable hardware modules and a reduction by up to 12.83% of the processing time required by using the conventional method in a dynamically partially reconfigurable system.