Digital watermarking
Signal Processing with Lapped Transforms
Signal Processing with Lapped Transforms
Attacks on Copyright Marking Systems
Proceedings of the Second International Workshop on Information Hiding
Robust Covert Communication over a Public Audio Channel Using Spread Spectrum
IHW '01 Proceedings of the 4th International Workshop on Information Hiding
StirMark Benchmark: Audio Watermarking Attacks
ITCC '01 Proceedings of the International Conference on Information Technology: Coding and Computing
Design and Implementation of a Secret Key Steganographic Micro-Architecture Employing FPGA
Proceedings of the conference on Design, automation and test in Europe - Volume 3
Digital Design: Principles and Practices (4th Edition)
Digital Design: Principles and Practices (4th Edition)
Audio Signal Watermarking in MCLT Domain with the Aid of 2D Pattern
ICDT '06 Proceedings of the international conference on Digital Telecommunications
New echo embedding technique for robust and imperceptible audio watermarking
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 2001. on IEEE International Conference - Volume 03
Hardware Realization of Steganographic Techniques
IIH-MSP '07 Proceedings of the Third International Conference on International Information Hiding and Multimedia Signal Processing (IIH-MSP 2007) - Volume 01
FPGA Implementation of a Modulated Complex Lapped Transform for Watermarking Systems
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
Spread-spectrum watermarking of audio signals
IEEE Transactions on Signal Processing
Rational dither modulation: a high-rate data-hiding method invariant to gain attacks
IEEE Transactions on Signal Processing - Part II
Time-spread echo method for digital audio watermarking
IEEE Transactions on Multimedia
IEEE Transactions on Information Theory
A novel echo-hiding scheme with backward and forward kernels
IEEE Transactions on Circuits and Systems for Video Technology
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Data hiding systems have emerged as a solution against the piracy problem, particularly those based on quantization have been widely used for its simplicity and high performance. Several data hiding applications, such as broadcasting monitoring and live performance watermarking, require a real-time multi-channel behavior. While Digital Signal Processors (DSP) have been used for implementing these schemes achieving real-time performance for audio signal processing, custom hardware architectures offer the possibility of fully exploiting the inherent parallelism of this type of algorithms for more demanding applications. This paper presents an efficient hardware implementation of a Rational Dither Modulation (RDM) algorithm-based data hiding system in the Modulated Complex Lapped Transform (MCLT) domain. In general terms, the proposed hardware architecture is conformed by an MCLT processor, an Inverse MCLT processor, a Coordinate Rotation Digital Computer (CORDIC) and an RDM-QIM processor. Results of implementing the proposed hardware architecture on a Field Programmable Gate Array (FPGA) are presented and discussed.