An Analog Processor Architecture for a Neural Network Classifier

Authors:
Michel Verleysen;Philippe Thissen;Jean-Luc Voz;Jordi Madrenas
Affiliations:
Catholic Univ. of Louvain, Louvain, Belgium;Catholic Univ. of Louvain, Louvain, Belgium;Catholic Univ. of Louvain, Louvain, Belgium;Polytechnic Univ. of Catalonia, Barcelona, Spain
Venue:
IEEE Micro
Year:
1994

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Abstract

Many neural-like algorithms currently under study support classification tasks. Several of these algorithms base their functionality on LVQ-like procedures to find locations of centroids in the data space, and on kernel (or radial-basis) functions centered on these centroids to approximate functions or probability densities. A generic analog chip could implement in a parallel way all basic functions found in these algorithms, permitting construction of a fast, portable classification system.