FPGA realization of the LIRA neural classifier

Authors:
Alejandro Vega;Tatiana Baidyk;Ernst Kussul;José Luís Pérez Silva
Affiliations:
Center of Applied Science and Technological Development, National Autonomous University of Mexico (UNAM), Mexico City, D.F., Mexico 04510;Center of Applied Science and Technological Development, National Autonomous University of Mexico (UNAM), Mexico City, D.F., Mexico 04510;Center of Applied Science and Technological Development, National Autonomous University of Mexico (UNAM), Mexico City, D.F., Mexico 04510;Center of Applied Science and Technological Development, National Autonomous University of Mexico (UNAM), Mexico City, D.F., Mexico 04510
Venue:
Optical Memory and Neural Networks
Year:
2011

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Abstract

Different types of neural networks can be used to classify images. We propose to apply LIRA (LImited Receptive Area) neural classifier to work with images. To accelerate the neural network functioning we propose a digital implementation of the LIRA neural classifier. We begin with a neuron design, and then continue with the neural network simulation. The advantage of neural network is its parallel structure and possibility of the training. FPGA (Field Programmable Gate Array) allows the implementation of these parallel algorithms in a single device. Speed of classification is one of the most important requirements in adaptive control systems based on computer vision. The contribution of this article is LIRA neural classifier implementation with FPGA for two classes to accelerate the training and recognition processes.