Silicon physical random functions
Proceedings of the 9th ACM conference on Computer and communications security
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
LFSR-based Hashing and Authentication
CRYPTO '94 Proceedings of the 14th Annual International Cryptology Conference on Advances in Cryptology
Elements of Information Theory (Wiley Series in Telecommunications and Signal Processing)
Elements of Information Theory (Wiley Series in Telecommunications and Signal Processing)
Aegis: a single-chip secure processor
Aegis: a single-chip secure processor
Physical unclonable functions for device authentication and secret key generation
Proceedings of the 44th annual Design Automation Conference
FPGA Intrinsic PUFs and Their Use for IP Protection
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Efficient Helper Data Key Extractor on FPGAs
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Soft decision helper data algorithm for SRAM PUFs
ISIT'09 Proceedings of the 2009 IEEE international conference on Symposium on Information Theory - Volume 3
Secure and Robust Error Correction for Physical Unclonable Functions
IEEE Design & Test
Modeling attacks on physical unclonable functions
Proceedings of the 17th ACM conference on Computer and communications security
Policy gradients for cryptanalysis
ICANN'10 Proceedings of the 20th international conference on Artificial neural networks: Part III
PUFKY: a fully functional PUF-based cryptographic key generator
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Strong PUFs and their (physical) unpredictability: a case study with power PUFs
Proceedings of the Workshop on Embedded Systems Security
A high reliability PUF using hot carrier injection based response reinforcement
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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A lightweight and secure key storage scheme using silicon Physical Unclonable Functions (PUFs) is described. To derive stable PUF bits from chip manufacturing variations, a lightweight error correction code (ECC) encoder / decoder is used. With a register count of 69, this codec core does not use any traditional error correction techniques and is 75% smaller than a previous provably secure implementation, and yet achieves robust environmental performance in 65nm FPGA and 0.13µ ASIC implementations. The security of the syndrome bits uses a new security argument that relies on what cannot be learned from a machine learning perspective. The number of Leaked Bits is determined for each Syndrome Word, reducible using Syndrome Distribution Shaping. The design is secure from a min-entropy standpoint against a machinelearning-equipped adversary that, given a ceiling of leaked bits, has a classification error bounded by ε. Numerical examples are given using latest machine learning results.