CCS '99 Proceedings of the 6th ACM conference on Computer and communications security
Cryptographic rights management of FPGA intellectual property cores
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
An Introduction to Error Correcting Codes with Applications
An Introduction to Error Correcting Codes with Applications
Silicon physical random functions
Proceedings of the 9th ACM conference on Computer and communications security
LFSR-based Hashing and Authentication
CRYPTO '94 Proceedings of the 14th Annual International Cryptology Conference on Advances in Cryptology
Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Energy Scalable Universal Hashing
IEEE Transactions on Computers
Disclosing the LDPC code decoder design space
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Combining Crypto with Biometrics Effectively
IEEE Transactions on Computers
Aegis: A Single-Chip Secure Processor
IEEE Design & Test
FPGA Intrinsic PUFs and Their Use for IP Protection
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Offline hardware/software authentication for reconfigurable platforms
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Read-proof hardware from protective coatings
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Hardware intrinsic security from D flip-flops
Proceedings of the fifth ACM workshop on Scalable trusted computing
Improving the quality of ring oscillator PUFs on FPGAs
WESS '10 Proceedings of the 5th Workshop on Embedded Systems Security
An alternative to error correction for SRAM-like PUFs
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
The glitch PUF: a new delay-PUF architecture exploiting glitch shapes
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Integrated circuit design for physical unclonable function using differential amplifiers
Analog Integrated Circuits and Signal Processing
Side-channel analysis of PUFs and fuzzy extractors
TRUST'11 Proceedings of the 4th international conference on Trust and trustworthy computing
Lightweight and secure PUF key storage using limits of machine learning
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Logically reconfigurable PUFs: memory-based secure key storage
Proceedings of the sixth ACM workshop on Scalable trusted computing
Using Data Contention in Dual-ported Memories for Security Applications
Journal of Signal Processing Systems
Comparison of SRAM and FF PUF in 65nm technology
NordSec'11 Proceedings of the 16th Nordic conference on Information Security Technology for Applications
Converse PUF-Based authentication
TRUST'12 Proceedings of the 5th international conference on Trust and Trustworthy Computing
Soft decision error correction for compact memory-based PUFs using a single enrollment
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
PUFKY: a fully functional PUF-based cryptographic key generator
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
ClockPUF: physical unclonable functions based on clock networks
Proceedings of the Conference on Design, Automation and Test in Europe
Comparative analysis of SRAM memories used as PUF primitives
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 3rd international workshop on Trustworthy embedded devices
An accurate probabilistic reliability model for silicon PUFs
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
A high reliability PUF using hot carrier injection based response reinforcement
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
On the effectiveness of the remanence decay side-channel to clone memory-based PUFs
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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Physical Unclonable Functions (PUFs) have properties that make them very attractive for a variety of security-related applications. Due to their inherent dependency on the physical properties of the device that contains them, they can be used to uniquely bind an application to a particular device for the purpose of IP protection. This is crucial for the protection of FPGA applications against illegal copying and distribution. In order to exploit the physical nature of PUFs for reliable cryptography a so-called helper data algorithm or fuzzy extractor is used to generate cryptographic keys with appropriate entropy from noisy and non-uniform random PUF responses. In this paper we present for the first time efficient implementations of fuzzy extractors on FPGAs where the efficiency is measured in terms of required hardware resources. This fills the gap of the missing building block for a full FPGA IP protection solution. Moreover, in this context we propose new architectures for the decoders of Reed-Muller and Golay codes, and show that our solutions are very attractive from both the area and error correction capability points of view.