Design and evaluation of parallel, scalable, curve based processor over binary field

  • Authors:
  • Rahila Bilal;M. Rajaram

  • Affiliations:
  • Department of ECE, Anna University, Chennai, India;Department of EEE, Anna University of Technology, Tirunelveli, India

  • Venue:
  • WSEAS Transactions on Computers
  • Year:
  • 2011

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Abstract

Implementing Public-Key cryptography systems is a challenge for most application platforms when several factors have to be considered in selecting the implementation platform. Elliptic Curve Cryptography is considered much more suitable than other public-key algorithms. It uses lower power consumption, has higher performance and can be implemented on small areas that can be achieved by using ECC. In this work, scalable and parallel framework of FPGA based, Dual Field (Prime and Binary Field) ECC processor is explored. Using Altera - Quartus software tool, a 160 bit ECC processor core with four 32 bit Arithmetic Units is evaluated on EP3SE50F780C3. Scalar multiplication is performed in 445 µsecs and occupies 9763 LUT's.