Use of elliptic curves in cryptography
Lecture notes in computer sciences; 218 on Advances in cryptology---CRYPTO 85
REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Elliptic curves in cryptography
Elliptic curves in cryptography
Improved Algorithms for Elliptic Curve Arithmetic in GF(2n)
SAC '98 Proceedings of the Selected Areas in Cryptography
A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2n)
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
An End-to-End Systems Approach to Elliptic Curve Cryptography
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable Dual-Field Elliptic Curve Cryptographic Processor
IEEE Transactions on Computers
High Performance FPGA based Elliptic Curve Cryptographic Co-Processor
ITCC '04 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2 - Volume 2
An FPGA Arithmetic Logic Unite for Computing Scalar Multiplication Using the Half-and-Add Method
RECONFIG '05 Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
Pipelined Computation of Scalar Multiplication in Elliptic Curve Cryptosystems (Extended Version)
IEEE Transactions on Computers
Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards
ASAP '06 Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors
IEEE Transactions on Computers
Customizable elliptic curve cryptosystems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A highly efficient cipher processor for dual-field elliptic curve cryptography
IEEE Transactions on Circuits and Systems II: Express Briefs
Design and evaluation of parallel, scalable, curve based processor over binary field
WSEAS Transactions on Computers
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We present a design framework that consists of a high-throughput, parallel, and scalable elliptic curve cryptographic (ECC) processor, and its cost-effectiveness methodology for the design exploration. A two-phase scheduling methodology is proposed to optimize the ECC arithmetic over both GF(p) and GF(2m). Based on the methodology, a parallel and scalable ECC architecture is also proposed. Our dual-field ECC architecture supports arbitrary elliptic curves and arbitrary finite fields with different field sizes. The optimization to a variety of applications with different area/throughput requirements can be achieved rapidly and efficiently. Using 0.13-µm CMOS technology, a 160-bit ECC processor core is implemented, which can perform elliptic-curve scalar multiplication in 340 µs over GF(p) and 155 µs over GF(2m), respectively. The comparison of speed and area overhead among different ECC designs justifies the cost-effectiveness of the proposed ECC architecture with its design methodology.