A minimal average accessing time scheduler for multicore processors

  • Authors:
  • Thomas Canhao Xu;Pasi Liljeberg;Hannu Tenhunen

  • Affiliations:
  • Turku Center for Computer Science and Department of Information Technology, University of Turku, Turku, Finland;Turku Center for Computer Science and Department of Information Technology, University of Turku, Turku, Finland;Turku Center for Computer Science and Department of Information Technology, University of Turku, Turku, Finland

  • Venue:
  • ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part II
  • Year:
  • 2011

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Abstract

In this paper, we study and analyze process scheduling for multicore processors. It is expected that hundreds of cores will be integrated on a single chip, known as a Chip Multiprocessor (CMP). However, operating system process scheduling, one of the most important design issue for CMP systems, has not been well addressed. We define a model for future CMPs, based on which a minimal average accessing time scheduling algorithm is proposed to reduce on-chip communication latencies and improve performance. The impact of memory access and inter process communication (IPC) in scheduling are analyzed. We explore six typical core allocation strategies. Results show that, a strategy with the minimal average accessing time of both core-core and core-memory outperforms other strategies, the overall performance for three applications (FFT, LU and H.264) has improved for 8.23%, 4.81% and 10.21% respectively comparing with other strategies.