Verification condition generation via theorem proving

  • Authors:

  • John Matthews;J. Strother Moore;Sandip Ray;Daron Vroon

  • Affiliations:

  • Galois Connections Inc., Beaverton, OR;Dept. of Computer Sciences, University of Texas at Austin, Austin, TX;Dept. of Computer Sciences, University of Texas at Austin, Austin, TX;College of Computing, Georgia Institute of Technology, Atlanta, GA

  • Venue:
  • LPAR'06 Proceedings of the 13th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
  • Year:
  • 2006

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Abstract

We present a method to convert (i) an operational semantics for a given machine language, and (ii) an off-the-shelf theorem prover, into a high assurance verification condition generator (VCG). Given a program annotated with assertions at cutpoints, we show how to use the theorem prover directly on the operational semantics to generate verification conditions analogous to those produced by a custom-built VCG. Thus no separate VCG is necessary, and the theorem prover can be employed both to generate and to discharge the verification conditions. The method handles both partial and total correctness. It is also compositional in that the correctness of a subroutine needs to be proved once, rather than at each call site. The method has been used to verify several machine-level programs using the ACL2 theorem prover.