Throttling capacity sharing in private L2 caches of CMPs

Authors:
Young-Sik Eom;Seong-Tae Jhang;Chu-Shik Jhon
Affiliations:
Seoul National University, Gwanak-gu, Seoul, Korea;The University of Suwon, Hwaseong-si, Gyeonggi-do, Korea;Seoul National University, Gwanak-gu, Seoul, Korea
Venue:
Proceedings of the 2011 ACM Symposium on Research in Applied Computation
Year:
2011

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Abstract

In Chip Multi-Processors (CMPs) with private L2 caches, to combine the strengths of private and shared caches, private caches can share capacity through spilling replaced blocks to other private caches. However, indiscriminate spilling can make the capacity problem worse and influence performance negatively. This paper proposes throttling capacity sharing (TCS) for effective capacity sharing. TCS determines whether to spill a replaced block by predicting its reuse possibility based on stack distance. We evaluate the performance improvement of TCS in a 4 core system. TCS improves weighted speedup on average by 54.64%, 5.34% and 7.21% compared to no spilling, Cooperative Caching (CC) with best spill probability and Dynamic Spill-Receive (DSR), respectively.