Efficient and correct execution of parallel programs that share memory
ACM Transactions on Programming Languages and Systems (TOPLAS)
The power of processor consistency
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Automatic fence insertion for shared memory multiprocessing
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
IEEE Transactions on Computers
Foundations of the C++ concurrency memory model
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
A Formally Verified Compiler Back-end
Journal of Automated Reasoning
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Communications of the ACM
Relaxed-memory concurrency and verified compilation
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Understanding POWER multiprocessors
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Safe optimisations for shared-memory concurrent programs
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Proceedings of the 13th international ACM SIGPLAN symposium on Principles and practices of declarative programming
Stability in weak memory models
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Lem: a lightweight tool for heavyweight semantics
ITP'11 Proceedings of the Second international conference on Interactive theorem proving
Verifying fence elimination optimisations
SAS'11 Proceedings of the 18th international conference on Static analysis
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Verifying local transformations on relaxed memory models
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Verifying a compiler for java threads
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
Can seqlocks get along with programming language memory models?
Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
Java and the java memory model -- a unified, machine-checked formalisation
ESOP'12 Proceedings of the 21st European conference on Programming Languages and Systems
False concurrency and strange-but-true machines
CONCUR'12 Proceedings of the 23rd international conference on Concurrency Theory
Trying to outperform a well-known index with a sequential scan
Proceedings of the Joint EDBT/ICDT 2013 Workshops
Fast RMWs for TSO: semantics and implementation
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
CompCertTSO: A Verified Compiler for Relaxed-Memory Concurrency
Journal of the ACM (JACM)
Compiler testing via a theory of sound optimisations in the C11/C++11 memory model
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
Relaxed separation logic: a program logic for C11 concurrency
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Making the java memory model safe
ACM Transactions on Programming Languages and Systems (TOPLAS)
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The upcoming C and C++ revised standards add concurrency to the languages, for the first time, in the form of a subtle *relaxed memory model* (the *C++11 model*). This aims to permit compiler optimisation and to accommodate the differing relaxed-memory behaviours of mainstream multiprocessors, combining simple semantics for most code with high-performance *low-level atomics* for concurrency libraries. In this paper, we first establish two simpler but provably equivalent models for C++11, one for the full language and another for the subset without consume operations. Subsetting further to the fragment without low-level atomics, we identify a subtlety arising from atomic initialisation and prove that, under an additional condition, the model is equivalent to sequential consistency for race-free programs. We then prove our main result, the correctness of two proposed compilation schemes for the C++11 load and store concurrency primitives to Power assembly, having noted that an earlier proposal was flawed. (The main ideas apply also to ARM, which has a similar relaxed memory architecture.) This should inform the ongoing development of production compilers for C++11 and C1x, clarifies what properties of the machine architecture are required, and builds confidence in the C++11 and Power semantics.