The Kernel-Adatron Algorithm: A Fast and Simple Learning Procedure for Support Vector Machines
ICML '98 Proceedings of the Fifteenth International Conference on Machine Learning
Support vector machine techniques for nonlinear equalization
IEEE Transactions on Signal Processing
A digital architecture for support vector machines: theory, algorithm, and FPGA implementation
IEEE Transactions on Neural Networks
Kerneltron: support vector "machine" in silicon
IEEE Transactions on Neural Networks
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We developed a high-speed concurrent support vector machine (CSVM) processor for real-time nonlinear channel equalization. All phases of the recognition process, including kernel computing, learning, and recall of the support vector machine (SVM) are performed on a single chip. The concurrent operation of this CSVM using a parallel architecture of elements allows it to achieve high speed. The hardware-friendly kernel adatron (KA) SVM learning algorithms are embedded on a chip. The results of the nonlinear channel equalization obtained by the KA algorithm are compared with those obtained by the quadratic programming (QP) method. The CSVM using the KA learning algorithm is designed and implemented using the FPGA chip. The CSVM processor performs 20% faster than the existing SVM processors.