On the practical limits of the evolutionary digital filter design at the gate level

  • Authors:
  • Lukáš Sekanina;Zdeněk Vašíček

  • Affiliations:
  • Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic;Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic

  • Venue:
  • EuroGP'06 Proceedings of the 2006 international conference on Applications of Evolutionary Computing
  • Year:
  • 2006

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Abstract

Simple digital FIR filters have recently been evolved directly in the reconfigurable gate array, ignoring thus a classical method based on multiply–and–accumulate structures. This work indicates that the method is very problematic. In this paper, the gate-level approach is extended to IIR filters, a new approach is proposed to the fitness calculation based on the impulse response evaluation and a comparison is performed between the evolutionary FIR filter design utilizing a full set and a reduced set of gates. The objective of these experiments is to show that the evolutionary design of digital filters at the gate level does not produce filters that are useful in practice when linearity of filters is not guaranteed by the evolutionary design method.