A reconfigurable implementation of the tate pairing computation over GF(2m)*

  • Authors:
  • Weibo Pan;William Marnane

  • Affiliations:
  • Dept. of Electrical and Electronic Engineering, University College Cork, Cork City, Ireland;Dept. of Electrical and Electronic Engineering, University College Cork, Cork City, Ireland

  • Venue:
  • ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
  • Year:
  • 2010

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Abstract

In this paper the performance of a closed formula implemented in reconfigurable hardware for the Tate pairing Algorithm over the binary field of GF(2m) is studied. Using the algorithm improvement of Soonhak Kwon [2], the schedule for performing the Tate pairing without a square root operation is explored along with the area and time consumption trade-offs involved in the hardware implementation of the target algorithm.