Memory-centric communication architecture for reconfigurable computing

Authors:
Kyungwook Chang;Kiyoung Choi
Affiliations:
Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea;Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea
Venue:
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Year:
2010

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Abstract

This paper presents a memory-centric communication architecture for a reconfigurable array of processing elements, which reduces the communication overhead by establishing a direct communication channel through a memory between the array and other masters in the system. Not to increase the area cost too much, we do not use a multi-port memory, but divide the memory into multiple memory units, each having a single port. The masters and the memory units have one-to-one mapping through a simple crossbar switch, which switches whenever data transfer is needed. Experimental results show that the proposed architecture achieves 76% performance improvement over the conventional architecture.