Towards a tighter integration of generated and custom-made hardware

Authors:
Harald Devos;Wim Meeus;Dirk Stroobandt
Affiliations:
Hardware and Embedded Systems Group, ELIS Dept., Ghent University, Gent, Belgium;Hardware and Embedded Systems Group, ELIS Dept., Ghent University, Gent, Belgium;Hardware and Embedded Systems Group, ELIS Dept., Ghent University, Gent, Belgium
Venue:
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Year:
2010

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Abstract

Most of today’s high-level synthesis tools offer a fixed set of interfaces to communicate with the outer world. A direct integration of custom IP in the datapath would often be more beneficial than an integration using such communication interfaces. If a certain interface protocol is not offered by the tool, either translation blocks (wrappers) are needed or the code should be written at a lower level. The former solution may hurt the performance, while the latter one is often impossible using an untimed high-level description. In this paper interface protocols or sets of IP core accesses are first described at a low level as sets of operations with scheduling information (macros). During the synthesis process, corresponding function calls are mapped to these macros. This facilitates the integration of custom-made hardware and hardware generated by high-level synthesis tools.