Input register architectures of high speed router for supporting the PHB of differentiated services

  • Authors:
  • Sungkwan Youm;Seung-Joon Seok;Seung-Jin Lee;Chul-Hee Kang

  • Affiliations:
  • Department of Electronics Engineering, Korea University, Seoul, Korea;Department of Computer Engineering, Kyungnam University, kyungnam, Korea;LG Electrics, Anyang-shi, Korea;Department of Electronics Engineering, Korea University, Seoul, Korea

  • Venue:
  • QoS-IP'05 Proceedings of the Third international conference on Quality of Service in Multiservice IP Networks
  • Year:
  • 2005

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Abstract

In this paper, we presents a new router architecture for supporting the Differentiated Services(DiffServ) in the input-registered router, which has multiple Virtual Output Registers(VORs) for buffering packets ahead of the non-blocking switching fabric. A queuing discipline function block needed on the DiffServ router is added in the input-registered router in order to support Per-Hop Behaviors(PHBs) of DiffServ. Also a new matching algorithm, First Scheduled First Matching (FSFM), is considered to match input packets and output ports in the proposed VOR architecture. The simulation results by using ARENA show that the proposed architecture offer packet loss rate and delay close to the results of output-queued router with N time speed-up switch fabric in various PHBs on DiffServ.