Reliability Wearout Mechanisms in Advanced CMOS Technologies
Reliability Wearout Mechanisms in Advanced CMOS Technologies
Journal of Cognitive Neuroscience
Statistical Performance Modeling and Optimization
Statistical Performance Modeling and Optimization
Reliability Implications of Bias-Temperature Instability in Digital ICs
IEEE Design & Test
Proceedings of the 2009 International Conference on Computer-Aided Design
The impact of NBTI effect on combinational circuit: modeling, simulation, and analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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As CMOS devices become smaller, process and aging variations become a major issue for circuit reliability and yield. In this paper, we analyze the effects of process variations on aging effects such as hot carrier injection (HCI) and negative bias temperature instability (NBTI). Using Monte-Carlo based transistor-level simulations including principal component analysis (PCA), the correlations between process variations and aging variations are considered. The accuracy of analysis is improved (2-7%) compared to other methods in which the correlations are ignored, especially in smaller technologies.