On the complexity of depth-2 circuits with threshold gates

  • Authors:
  • Kazuyuki Amano;Akira Maruoka

  • Affiliations:
  • GSIS, Tohoku University, Sendai, Japan;GSIS, Tohoku University, Sendai, Japan

  • Venue:
  • MFCS'05 Proceedings of the 30th international conference on Mathematical Foundations of Computer Science
  • Year:
  • 2005

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Abstract

The paper investigates the complexity of depth-two circuits with threshold gates and consisting of two parts. First, we develop a method for deriving a lower bound on the size of depth two circuits with a threshold gate at the top and a certain type of gates at the bottom. We apply the method for circuits with symmetric gates at the bottom that compute the “inner product mod 2”, and obtain a lower bound of 1.3638n. Although our lower bound is slightly weaker than the best known lower bound of Ω(2n/2/n), which was recently proved by Forster et al. [5,6], our method has unique features: A lower bound is obtained by solving a certain linear program, and solving larger linear programs yield higher lower bounds. We also discuss the generalization of the proposed method. Second, we develop a simplified simulation of a depth-one threshold circuit with unbounded weights by a depth-two threshold circuit with small weights. Precisely, we give an explicit construction of depth-two circuits with small weights consist of Õn5 gates that compute an arbitrary threshold function. We also give the construction of such circuits with O(n3/log n) gates computing the COMPARISON and CARRY functions, and that with O(n4/log n) gates computing the ADDITION function. These improve the previously known constructions on its size and simplicity.