Linearizability: a correctness condition for concurrent objects
ACM Transactions on Programming Languages and Systems (TOPLAS)
Alternative implementations of two-level adaptive branch prediction
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Proceedings of the fourteenth annual ACM symposium on Principles of distributed computing
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Multiple Reservations and the Oklahoma Update
IEEE Parallel & Distributed Technology: Systems & Technology
Software transactional memory for dynamic-sized data structures
Proceedings of the twenty-second annual symposium on Principles of distributed computing
Language support for lightweight transactions
OOPSLA '03 Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Time-based transactional memory with scalable time bases
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures
An effective hybrid transactional memory system with strong isolation guarantees
Proceedings of the 34th annual international symposium on Computer architecture
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Maintaining Consistent Transactional States without a Global Clock
SIROCCO '08 Proceedings of the 15th international colloquium on Structural Information and Communication Complexity
Stretching transactional memory
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
Making STMs Cache Friendly with Compiler Transformations
PACT '11 Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques
Conflict detection and validation strategies for software transactional memory
DISC'06 Proceedings of the 20th international conference on Distributed Computing
DISC'06 Proceedings of the 20th international conference on Distributed Computing
A lazy snapshot algorithm with eager validation
DISC'06 Proceedings of the 20th international conference on Distributed Computing
Maintaining consistency in software transactional memory through dynamic versioning tuning
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
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Time-based software transactional memories (STMs) exploit a global shared counter to reason about consistency of transactional data and order in which transactions commit. While time-based STMs avoid the large validation overhead of transactional memories that always check consistency when a new memory location is accessed, they increase contention over the global counter. When a transaction commits, it updates the global counter which may result in cache coherence misses if transactions commit frequently. The alternative validation method is to avoid frequent updates to the central global counter, increment it locally, and use it to tag memory locations. However, as we show in this paper, the optimum validation policy changes not only across applications but also within an application and through different phases of a program. We propose adaptive global clock (AGC) which dynamically selects one of the two validation techniques to reduce contention over the global counter and improve performance. AGC is a speculative approach and relies on history of transactions to select a validation technique. We have incorporated AGC into TL2 and compared the performance of the new implementation with the original STM using Stamp v0.9.10 benchmark suite. Our results reveal that AGC improves performance of applications up to 31%.