Introduction to algorithms
Atomic snapshots of shared memory
Journal of the ACM (JACM)
Language support for lightweight transactions
OOPSLA '03 Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Time-based transactional memory with scalable time bases
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures
An effective hybrid transactional memory system with strong isolation guarantees
Proceedings of the 34th annual international symposium on Computer architecture
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language
Proceedings of the International Symposium on Code Generation and Optimization
Dynamic performance tuning of word-based software transactional memory
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
DISC'06 Proceedings of the 20th international conference on Distributed Computing
A Lock-Based STM Protocol That Satisfies Opacity and Progressiveness
OPODIS '08 Proceedings of the 12th International Conference on Principles of Distributed Systems
Provable STM Properties: Leveraging Clock and Locks to Favor Commit and Early Abort
ICDCN '09 Proceedings of the 10th International Conference on Distributed Computing and Networking
DISC'10 Proceedings of the 24th international conference on Distributed computing
AGC: adaptive global clock in software transactional memory
Proceedings of the 2012 International Workshop on Programming Models and Applications for Multicores and Manycores
Maintaining consistency in software transactional memory through dynamic versioning tuning
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
Reduced hardware transactions: a new approach to hybrid transactional memory
Proceedings of the twenty-fifth annual ACM symposium on Parallelism in algorithms and architectures
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A crucial property required from software transactional memory systems (STMs) is that transactions, even ones that will eventually abort, will operate on consistent states. The only known technique for providing this property is through the introduction of a globally shared version clock whose values are used to tag memory locations. Unfortunately, the need for a shared clock moves STM designs from being completely decentralized back to using centralized global information.This paper presents TLC, the first thread-local clock mechanism for allowing transactions to operate on consistent states. TLC is the proof that one can devise coherent-state STM systems without a global clock.A set of early benchmarks presented here within the context of the TL2 STM algorithm, shows that TLC's thread-local clocks perform as well as a global clock on small scale machines. Of course, the big promise of the TLC approach is in providing a decentralized solution for future large scale machines, ones with hundreds of cores. On such machines, a globally coherent clock based solution is most likely infeasible, and TLC promises a way for transactions to operate consistently in a distributed fashion.