A multizone pipelined cache for IP routing

  • Authors:
  • Soraya Kasnavi;Paul Berube;Vincent C. Gaudet;José Nelson Amaral

  • Affiliations:
  • Dept. of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada;Dept. of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada;Dept. of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada;Dept. of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada

  • Venue:
  • NETWORKING'05 Proceedings of the 4th IFIP-TC6 international conference on Networking Technologies, Services, and Protocols; Performance of Computer and Communication Networks; Mobile and Wireless Communication Systems
  • Year:
  • 2005

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Abstract

Caching recently referenced IP addresses and their forwarding information is an effective strategy to increase routing lookup speed. This paper proposes a multizone non–blocking pipelined cache for IP routing lookup that achieves lower miss rates compared to previously reported IP caches. The twostage pipeline design provides a half–prefix half-full address cache and reduces the cache power consumption. By adopting a very small non-blocking buffer, the cache reduces the effective miss penalty. This cache design takes advantage of storing prefixes but requires smaller table expansions (up to 50% less) compared with prefix caches. Simulation results on real traffic display lower cache miss rate and up to 30% reduction in power consumption.